HD64F2638F20J Datasheet, PDF (1003/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 23B Power-Down Modes [HD64F2636UF, HD6432636UF, HD64F2638UF, HD6432638UF,
HD64F2638WF, HD6432638WF, HD64F2639UF, HD6432639UF, HD64F2639WF, HD6432639WF,
HD64F2630UF, HD6432630UF, HD64F2630WF, HD6432630WF, HD6432635F, HD64F2635F, HD6432634F]
23B.1.1 Register Configuration
Power-down modes are controlled by the SBYCR, SCKCR, LPWRCR, TCSR (WDT1), and
MSTPCR registers. Table 23B-4 summarizes these registers.
Table 23B-4 Power-Down Mode Registers
Name
Abbreviation
Standby control register
SBYCR
System clock control register
SCKCR
Low-power control register
LPWRCR
Timer control/status register
TCSR
Module stop control register
A, B, C, D
MSTPCRA
MSTPCRB
MSTPCRC
MSTPCRD
Note: 1. Lower 16 bits of the address.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
H'58
H'00
H'00
H'00
H'3F
H'FF
H'FF
B'11******
Address*¹
H'FDE4
H'FDE6
H'FDEC
H'FFA2
H'FDE8
H'FDE9
H'FDEA
H'FC60
23B.2 Register Descriptions
23B.2.1 Standby Control Register (SBYCR)
Bit
:
7
6
5
4
3
2
1
0
SSBY STS2 STS1 STS0 OPE
⎯
⎯
⎯
Initial value :
0
1
0
1
1
0
0
0
R/W
:
R/W
R/W
R/W
R/W
R/W
⎯
⎯
⎯
SBYCR is an 8-bit readable/writable register that performs power-down mode control.
SBYCR is initialized to H'58 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—Software Standby (SSBY): When making a low power dissipation mode transition by
executing the SLEEP instruction, the operating mode is determined in combination with other
control bits.
Note that the value of the SSBY bit does not change even when shifting between modes using
interrupts.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 953 of 1458