SH7280 Datasheet, PDF (891/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 17 Serial Communication Interface with FIFO (SCIF)
Figure 17.5 shows an example of the operation for transmission.
Serial
data
Start
1 bit
0 D0
Data
Parity Stop Start
bit bit bit
D1
D7 0/1 1
0 D0
Data
Parity Stop
bit
bit
1
D1
D7 0/1 1
Idle state
(mark state)
TDFE
TEND
TXI interrupt
request
Data written to SCFTDR and TDFE
flag read as 1 then cleared to 0 by
TXI interrupt handler
One frame
TXI interrupt
request
Figure 17.5 Example of Transmit Operation
(8-Bit Data, Parity, 1 Stop Bit)
Rev. 1.00 Jun. 26, 2008 Page 861 of 1692
REJ09B0393-0100