SH7280 Datasheet, PDF (770/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 15 Watchdog Timer (WDT)
Initial
Bit
Bit Name Value R/W Description
6
WT/IT
0
R/W Timer Mode Select
Selects whether to use the WDT as a watchdog timer
or an interval timer.
0: Use as interval timer
1: Use as watchdog timer
Note: When the WTCNT overflows in watchdog timer
mode, the WDTOVF signal is output externally.
If this bit is modified when the WDT is running,
the up-count may not be performed correctly.
5
TME
0
R/W Timer Enable
Starts and stops timer operation. Clear this bit to 0
when using the WDT in software standby mode or
when changing the clock frequency.
0: Timer disabled
Count-up stops and WTCNT value is retained
1: Timer enabled
4, 3

All 1
R
Reserved
These bits are always read as 1. The write value
should always be 1.
Rev. 1.00 Jun. 26, 2008 Page 740 of 1692
REJ09B0393-0100