SH7280 Datasheet, PDF (659/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Pφ
Input capture
signal
TCNT
N
TGR
N
TGF flag
TGI interrupt
Figure 11.112 TGI Interrupt Timing (Input Capture) (Channel 5)
(3) TCFV Flag/TCFU Flag Setting Timing
Figure 11.113 shows the timing for setting of the TCFV flag in TSR on overflow, and TCIV
interrupt request signal timing.
Figure 11.114 shows the timing for setting of the TCFU flag in TSR on underflow, and TCIU
interrupt request signal timing.
Pφ
TCNT input
clock
TCNT
(overflow)
Overflow
signal
TCFV flag
H'FFFF
H'0000
TCIV interrupt
Figure 11.113 TCIV Interrupt Setting Timing
Rev. 1.00 Jun. 26, 2008 Page 629 of 1692
REJ09B0393-0100