SH7280 Datasheet, PDF (285/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 9 Bus State Controller (BSC)
9.4 Register Descriptions
The BSC has the following registers.
Do not access spaces other than area 0 until settings of the connected memory interface are
completed.
Table 9.4 Register Configuration
Register Name
Abbreviation R/W Initial Value Address
Access Size
Common control register
CMNCR
R/W H'00001010 H'FFFC0000 32
CSn space bus control register
CSnBCR
R/W H'36DB0400* H'FFFC 0004 to 32
H'FFFC 0020
CSn space wait control register
CSnWCR
R/W H'00000500 H'FFFC0028 to 32
H'FFFC 0044
SDRAM control register
SDCR
R/W H'00000000 H'FFFC004C 32
Refresh timer control/status register RTCSR
R/W H'00000000 H'FFFC0050 32
Refresh timer counter
RTCNT
R/W H'00000000 H'FFFC0054 32
Refresh time constant register
RTCOR
R/W H'00000000 H'FFFC0058 32
Bus function extending register
BSCEHR
R/W H'0000
H'FFFE3C1A 16
Note: * Value when selecting the16-bit bus width with the external pin (MD0). When selecting
the 32-bit bus width, the initial value will be H'36DB 0600 and when selecting the 8-bit
bus width, the initial value will be H'36DB 0200.
Rev. 1.00 Jun. 26, 2008 Page 255 of 1692
REJ09B0393-0100