SH7280 Datasheet, PDF (165/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 6 Interrupt Controller (INTC)
6.4.5 On-Chip Peripheral Module Interrupts
On-chip peripheral module interrupts are generated by the following on-chip peripheral modules:
• A/D converter (ADC)
• Controller area network (RCAN-ET)
• Direct memory access controller (DMAC)
• Compare match timer (CMT)
• Bus state controller (BSC)
• Watchdog timer (WDT)
• USB function module (USB)
• Multi-function timer pulse unit 2 (MTU2)
• Multi-function timer pulse unit 2S (MTU2S)
• Port output enable 2 (POE2)
• I²C bus interface 3 (IIC3)
• Synchronous serial communication unit (SSU)
• Serial communication interface (SCI)
• Serial communication interface with FIFO (SCIF)
As every source is assigned a different interrupt vector, the source does not need to be identified in
the exception service routine. A priority level in a range from 0 to 18 can be set for each module
by interrupt priority registers 05 to 18 (IPR05 to IPR18). The on-chip peripheral module interrupt
exception handling sets the I3 to I0 bits in SR to the priority level of the accepted on-chip
peripheral module interrupt.
Rev. 1.00 Jun. 26, 2008 Page 135 of 1692
REJ09B0393-0100