SH7280 Datasheet, PDF (294/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 9 Bus State Controller (BSC)
Note: * Details of Initial value of this bit are shown below according to the product and MCU
operating mode.
Mode
SH7243
SH7285
SH7286
Mode 0
10
10
11
Mode 1
01
01
10
Mode 2
01
01
01
Mode 3
01
01
01
9.4.3 CSn Space Wait Control Register (CSnWCR) (n = 0 to 7)
CSnWCR specifies various wait cycles for memory access. The bit configuration of this register
varies as shown below according to the memory type (TYPE2 to TYPE0) specified by the CSn
space bus control register (CSnBCR). Specify CSnWCR before accessing the target area. Specify
CSnBCR first, then specify CSnWCR.
CSnWCR is initialized to H'00000500 by a power-on reset and retains the value by a manual reset
and in software standby mode.
(1) Normal Space, SRAM with Byte Selection, MPX-I/O
• CS0WCR
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
-
-
-
BAS
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
SW[1:0]
WR[3:0]
WM
-
-
-
-
HW[1:0]
Initial value: 0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R
R
R
R R/W R/W
Bit
Bit Name
31 to 21  *
Initial
Value
All 0
R/W Description
R/W Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 1.00 Jun. 26, 2008 Page 264 of 1692
REJ09B0393-0100