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SH7280 Datasheet, PDF (1633/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family
Section 31 Electrical Characteristics
31.3.3 Bus Timing
Table 31.7 Bus Timing
Conditions: VCC = PLLVCC = 3.0 to 5.5 V, AVCC = AVREF = 4.5 V to 5.5 V,
VSS = PLLVSS = AVREFVSS = AVSS = 0 V,
Ta = −20°C to +85°C (Consumer specifications),
Ta = −40°C to +85°C (Industrial specifications)
Item
Address delay time 1
Symbol
t
AD1
Min.
1
Bφ = 50 MHz*
Max.
20
Address delay time 2
tAD2
Address delay time 3
tAD3
Address setup time
t
AS
1/2tcyc + 1
1/2tcyc + 1
0
1/2tcyc + 20
1/2tcyc + 20

Address hold time
t
0
AH

BS delay time
tBSD

20
CS delay time 1
tCSD1
1
20
CS delay time 2
tCSD2
Read write delay time 1 t
RWD1
1/2tcyc + 1
1
1/2tcyc + 20
20
Read write delay time 2 t
RWD2
Read strobe delay time t
RSD
1/2t + 1
cyc
1/2t + 1
cyc
1/2t + 20
cyc
1/2t + 20
cyc
Read data setup time 1 tRDS1
Read data setup time 2 tRDS2
1/2tcyc + 20

20

Read data setup time 3 t
RDS3
Read data setup time 4 t
RDS4
1/2t + 20
cyc

1/2t + 20
cyc

Unit Figure
ns Figures 31.11 to
31.35, 31.38
ns Figure 31.18
ns Figures 31.36, 31.37
ns Figures 31.11 to
31.14, 31.18
ns Figures 31.11 to
31.14
ns Figures 31.11 to
31.32, 31.36, 31.38
ns Figures 31.11 to
31.35, 31.38
ns Figures 31.36, 31.37
ns Figures 31.11 to
31.35, 31.38
ns Figures 31.36, 31.37
ns Figures 31.11 to
31.15, 31.17 to
31.18, 31.38
ns Figures 31.11 to
31.15, 31.17, 31.38
ns Figures 31.16, 31.19
to 31.22, 31.27 to
31.29
ns Figure 31.18
ns Figure 31.36
Rev. 1.00 Jun. 26, 2008 Page 1603 of 1692
REJ09B0393-0100