SH7280 Datasheet, PDF (612/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
TGRA_3
TCDR
Bit WRE = 1
Synchronous clearing
TGRB_3
TCNT_3
(MTU2)
TCNT_4
(MTU2)
TDDR
H'0000
Positive phase
Negative phase
Output waveform is active-low.
Initial value output is suppressed.
Figure 11.61 Example of Synchronous Clearing in Interval Tb at Trough
(Timing (11) in Figure 11.56; Bit WRE of TWCR is 1)
Rev. 1.00 Jun. 26, 2008 Page 582 of 1692
REJ09B0393-0100