SH7280 Datasheet, PDF (1311/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 24 I/O Ports
Table 24.2 Port A Data Registers H and L (PADRH and PADRL) Read/Write Operations
• PADRH bits 7 to 5 and PADRL bits 15 to 0
PAIORH,
PAIORL
0
1
Pin Function
General input
Other than
general input
General output
Other than
general output
Read
Write
Pin state
Can write to PADRH and PADRL, but it has no
effect on pin state.
Pin state
Can write to PADRH and PADRL, but it has no
effect on pin state.
PADRH or The value written is output from the pin.
PADRL value
PADRH or Can write to PADRH and PADRL, but it has no
PADRL value effect on pin state.
24.1.3 Port A Port Registers H and L (PAPRH and PAPRL)
PAPRH and PAPRL are 16-bit readable/writable registers, which always return the states of the
pins regardless of the PFC setting. In SH7243, Bits PA15PR to PA12PR and PA9PR to PA6PR
correspond to pins PA15 to PA12 and PA9 to PA6 respectively (description of multiplexed
functions are abbreviated here). In SH7285, Bits PA23PR to PA21PR, PA15PR to PA12PR and
PA9PR to PA0PR correspond to pins PA23 to PA21, PA15 to PA12 and PA9 to PA0 respectively
(description of multiplexed functions are abbreviated here). In SH7286, Bits PA23PR to PA21PR
and PA15PR to PA0PR correspond to pins PA23 to PA21 and PA15 to PA0 respectively
(description of multiplexed functions are abbreviated here).
Rev. 1.00 Jun. 26, 2008 Page 1281 of 1692
REJ09B0393-0100