SH7280 Datasheet, PDF (1433/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 26 Flash Memory
(1) Download Control
The on-chip program is automatically downloaded by setting the SCO bit to 1. The on-chip RAM
area to be downloaded is the area as much as 3 Kbytes starting from the start address specified by
FTDAR. For the address map of the on-chip RAM, see figure 26.10.
The download control is set by using the programming/erasing interface registers. The return
value is given by the DPFR parameter.
(a) Download Pass/Fail Result Parameter (DPFR: One Byte of Start Address of On-Chip
RAM Specified by FTDAR)
This parameter indicates the return value of the download result. The value of this parameter can
be used to determine if downloading is executed or not. Since the confirmation whether the SCO
bit is set to 1 is difficult, the certain determination must be performed by setting one byte of the
start address of the on-chip RAM area specified by FTDAR to a value other than the return value
of download (for example, H'FF) before the download start (before setting the SCO bit to 1). For
the checking method of download results, see section 26.5.3 (2), Programming Procedure in User
Program Mode.
Bit: 7
-
Initial value: -
R/W: R/W
6
-
-
R/W
5
-
-
R/W
4
-
-
R/W
3
-
-
R/W
2
SS
-
R/W
1
FK
-
R/W
0
SF
-
R/W
Rev. 1.00 Jun. 26, 2008 Page 1403 of 1692
REJ09B0393-0100