SH7280 Datasheet, PDF (1640/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 31 Electrical Characteristics
CK
A25 to A0
Ta1
Ta2
Ta3
T1
Tw
Tw
T2
t_AD1
t_AD1
CS5
RD/WR
t_CSD1
t_RWD1
t_CSD1
t_RWD1
AH
t_AHD
t_AHD
t_AHD
Read
RD
D15 to D0
Write
WE1, WE0
D15 to D0
BS
WAIT
DACKn*
TENDn*
t_BSD
t_RSD
t_MAD
t_MAD
t_BSD
Address
t_MAH
t_WED1
t_WDD1
t_MAH
Address
t_RSD
t_RDH1
t_RDS1
Data
t_WED1
Data
t_WDH1
t_DACD
t_DACD
t_WTH
t_WTS
t_WTH
t_WTS
t_DACD
t_DACD
Note: * Waveforms for DACKn and TENDn are when active low is specified.
Figure 31.15 MPX-I/O Interface Bus Cycle
(Three Address Cycles, One Software Wait Cycle, One External Wait Cycle)
Rev. 1.00 Jun. 26, 2008 Page 1610 of 1692
REJ09B0393-0100