SH7280 Datasheet, PDF (283/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 9 Bus State Controller (BSC)
9.3.2 Setting Operating Modes
This LSI can set the following modes of operation at the time of power-on reset using the external
pins.
• Single-Chip Mode/External Bus Accessible Mode
In single-chip mode, no access is made to the external bus, and the LSI is activated by the on-
chip ROM program upon a power-on reset. The BSC module enters the module standby state
to reduce power consumption.
The address, data, bus control pins used in external bus accessible mode can be used as the
port function pins in single-chip mode.
• On-Chip ROM-Enabled Mode/On-Chip ROM-Disabled Mode
In on-chip ROM-enabled mode, since the first half of area 0 is allocated to the on-chip ROM,
the LSI can be activated by the on-chip ROM program upon a power-on reset. The second half
of area 0 is the external memory space.
In on-chip ROM-disabled mode, the LSI is activated by the program stored in the external
memory allocated to area 0. The second half of area 0 is the external memory space. In this
case, a ROM is assumed for the external memory of area 0. Therefore, minimum functions are
provided for the pins including address bus, data bus, CS0, and RD. Although BS, RDWR,
WEn, and other pins are shown in the examples of access waveforms in this section, these are
examples when pin settings are performed by the pin function controller. For details, see
section 23, Pin Function Controller (PFC). Do not perform any operation except for area 0 read
access until the pin settings by the program is completed.
• Initial Settings of Data Bus Widths for Areas 0 to 7
The initial settings of data bus widths of areas 0 to 7 can be selected at a time as 16 bits or 32
bits in the SH7286 or 8 bits or 16 bits in the SH7285 and SH7243.
In on-chip ROM-disabled mode, the data bus width of area 0 cannot be changed from its initial
setting after a power-on reset, but the data bus widths of areas 1 to 7 can be changed by
register settings in the program. In on-chip ROM-enabled mode, all the data bus widths of
areas 0 to 7 can be changed by register settings in the program. Note that data bus widths will
be restricted depending on memory types.
Rev. 1.00 Jun. 26, 2008 Page 253 of 1692
REJ09B0393-0100