SH7280 Datasheet, PDF (270/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 8 Data Transfer Controller (DTC)
Input circuit
Transfer information
located on the on-chip memory
Input buffer
1st data transfer
information
2nd data transfer
information
Chain transfer
(counter = 0)
Upper 8 bits of DAR
Figure 8.19 Chain Transfer when Transfer Counter = 0
Rev. 1.00 Jun. 26, 2008 Page 240 of 1692
REJ09B0393-0100