SH7280 Datasheet, PDF (654/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Pφ
Input capture
signal
Counter clear
signal
TCNT
N
H'0000
TGR
N
Figure 11.102 Counter Clear Timing (Input Capture) (Channels 0 to 5)
(5) Buffer Operation Timing
Figures 11.103 to 11.105 show the timing in buffer operation.
Pφ
TCNT
n
n+1
Compare
match buffer
signal
TGRA,
TGRB
n
N
TGRC,
TGRD
N
Figure 11.103 Buffer Operation Timing (Compare Match)
Rev. 1.00 Jun. 26, 2008 Page 624 of 1692
REJ09B0393-0100