SH7280 Datasheet, PDF (782/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 16 Serial Communication Interface (SCI)
• Choice of LSB-first or MSB-first data transfer (except for 7-bit data in asynchronous mode)
• Four types of interrupts: There are four interrupt sources, transmit-data-empty, transmit end,
receive-data-full, and receive error interrupts, and each interrupt can be requested
independently. The data transfer controller (DTC) can be activated by the transmit-data-empty
interrupt or receive-data-full interrupt to transfer data.
• Module standby mode can be set
Figure 16.1 shows a block diagram of the SCI.
RXD
TXD
SCK
SCRDR
SCRSR
Module data bus
SCTDR
SCSSR
SCSCR
SCBRR
SCTSR
SCSMR
SCSPTR
SCSDCR
Transmission/reception
control
Baud rate
generator
Parity generation
Parity check
Clock
External clock
SCI
[Legend]
SCRSR: Receive shift register
SCRDR: Receive data register
SCTSR: Transmit shift register
SCTDR: Transmit data register
SCSMR: Serial mode register
SCSCR: Serial control register
SCSSR: Serial status register
SCBRR: Bit rate register
SCSPTR: Serial port register
SCSDCR: Serial direction control register
Figure 16.1 Block Diagram of SCI
Internal
data bus
Pφ
Pφ/4
Pφ/16
Pφ/64
TEI
TXI
RXI
ERI
Rev. 1.00 Jun. 26, 2008 Page 752 of 1692
REJ09B0393-0100