SH7280 Datasheet, PDF (711/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 12 Multi-Function Timer Pulse Unit 2S (MTU2S)
Section 12 Multi-Function Timer Pulse Unit 2S (MTU2S)
This LSI has an on-chip multi-function timer pulse unit 2S (MTU2S) that comprises three 16-bit
timer channels. The MTU2S includes channels 3 to 5 of the MTU2. For details, refer to section 11,
Multi-Function Timer Pulse Unit 2 (MTU2). To distinguish from the MTU2, "S" is added to the
end of the MTU2S input/output pin and register names. For example, TIOC3A is called TIOC3AS
and TGRA_3 is called TGRA_3S in this section.
The MTU2S can operate at 100 MHz max. for complementary PWM output functions or at 50
MHz max. for the other functions.
Table 12.1 MTU2S Functions
Item
Channel 3
Channel 4
Channel 5
Count clock
Mφ/1
Mφ/4
Mφ/16
Mφ/64
Mφ/256
Mφ/1024
Mφ/1
Mφ/4
Mφ/16
Mφ/64
Mφ/256
Mφ/1024
Mφ/1
Mφ/4
Mφ/16
Mφ/64
General registers TGRA_3S
TGRB_3S
TGRA_4S
TGRB_4S
TGRU_5S
TGRV_5S
TGRW_5S
General registers/ TGRC_3S
TGRC_4S
—
buffer registers
TGRD_3S
TGRD_4S
I/O pins
TIOC3AS
TIOC3BS
TIOC3CS
TIOC3DS
TIOC4AS
TIOC4BS
TIOC4CS
TIOC4DS
Input pins
TIC5US
TIC5VS
TIC5WS
Counter clear
function
TGR compare match or TGR compare match or TGR compare match or
input capture
input capture
input capture
Compare 0 output √
√
—
match
1 output √
√
—
output
Toggle √
√
—
output
Input capture
√
√
√
function
Synchronous
√
√
—
operation
Rev. 1.00 Jun. 26, 2008 Page 681 of 1692
REJ09B0393-0100