SH7280 Datasheet, PDF (247/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Start
Match &
RRS = 1
Vector number
comparison
Not match | RRS = 0
Read DTC vector
Next transfer
Read transfer
information
Transfer data
Update transfer
information
Write transfer information
Section 8 Data Transfer Controller (DTC)
Update the start address
of transfer information
CHNE = 1
Yes
No
Transfer counter = 0
or DISEL = 1 _Yes
No
Clear activation
source flag
CHNS = 0
Yes
No
Transfer counter = 0
Yes
No
DISEL = 1
Yes
No
Clear DTCER/request an interrupt
to the CPU
End
Figure 8.4 Flowchart of DTC Operation
Rev. 1.00 Jun. 26, 2008 Page 217 of 1692
REJ09B0393-0100