SH7280 Datasheet, PDF (418/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 10 Direct Memory Access Controller (DMAC)
Channel Register Name
Abbreviation R/W Initial Value Address
Access
Size
Common DMA operation register DMAOR
R/W*² H'0000
H'FFFE1200 8, 16
0 and 1 DMA extension
resource selector 0
DMARS0
R/W H'0000
H'FFFE1300 16
2 and 3 DMA extension
resource selector 1
DMARS1
R/W H'0000
H'FFFE1304 16
4 and 5 DMA extension
resource selector 2
DMARS2
R/W H'0000
H'FFFE1308 16
6 and 7 DMA extension
resource selector 3
DMARS3
R/W H'0000
H'FFFE130C 16
Notes: 1. For the HE and TE bits in CHCRn, only 0 can be written to clear the flags after 1 is
read.
2. For the AE and NMIF bits in DMAOR, only 0 can be written to clear the flags after 1 is
read.
Rev. 1.00 Jun. 26, 2008 Page 388 of 1692
REJ09B0393-0100