SH7280 Datasheet, PDF (1720/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

TSYCR ............................................... 486
TSYR.................................................. 495
TWCR ................................................ 519
TXACK0 .......................................... 1055
TXCR0 ............................................. 1054
TXPR1, TXPR0................................ 1052
UMSR0............................................. 1059
USBDASTS...................................... 1342
USBDMAR ...................................... 1344
USBEPDR0i ..................................... 1334
USBEPDR0o .................................... 1334
USBEPDR0s..................................... 1335
USBEPDR2 ...................................... 1337
USBEPDR3 ...................................... 1338
USBEPSTL....................................... 1346
USBEPSZ0o ..................................... 1338
USBEPSZ1 ....................................... 1339
USBFCLR ........................................ 1343
USBIER0.......................................... 1332
USBIER1.......................................... 1333
USBIFR0 .......................................... 1327
USBIFR1 .......................................... 1329
USBISR0 .......................................... 1330
USBISR1 .......................................... 1331
USBTRG .......................................... 1340
USDTENDRR .................................... 132
WRCSR .............................................. 742
WTCNT.............................................. 738
WTCSR .............................................. 739
Relationship between clock
operating mode and frequency range........ 79
Relationship between refresh requests
and bus cycles......................................... 350
Repeat transfer mode .............................. 223
Reset configuration............................... 1518
Reset state................................................. 62
Reset-synchronized PWM mode ............ 551
Restoration from bank ............................ 157
Restoration from stack............................ 158
Restriction on DMAC and DTC usage ... 877
Rev. 1.00 Jun. 26, 2008 Page 1690 of 1692
REJ09B0393-0100
RISC-type instruction set.......................... 30
Round-robin mode .................................. 415
S
Saving to bank ........................................ 156
Saving to stack ........................................ 158
SCI interrupt sources .............................. 811
SCIF interrupt sources ............................ 875
SCIF module timing.............................. 1639
SCSPTR and SCI pins ............................ 812
SDRAM interface ................................... 322
Self-refreshing ........................................ 348
Sending a break signal .................... 815, 877
Serial communication interface (SCI)..... 751
Serial communication interface with FIFO
(SCIF) ..................................................... 819
Setting analog input voltage.................. 1015
Shift instructions ....................................... 56
Sign extension of word data...................... 30
Single address mode ............................... 421
Single chip mode ...................................... 64
Single-cycle scan mode........................... 987
Slave receive operation ........................... 952
Slave transmit operation ......................... 949
Sleep mode............................................ 1509
Slot illegal instructions ........................... 112
Software protection............................... 1442
Software standby mode......................... 1510
SRAM interface with byte selection ....... 362
SSU Interrupt sources ............................. 923
SSU mode ............................................... 904
Stack after interrupt exception
handling .................................................. 148
Stack status after exception handling
ends ......................................................... 115
Stall operations ..................................... 1362
Standby control circuit.............................. 75
Status register (SR) ................................... 24
Supported DMA transfers ....................... 418