SH7280 Datasheet, PDF (335/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 9 Bus State Controller (BSC)
9.5 Operation
9.5.1 Endian/Access Size and Data Alignment
This LSI supports big endian in which the 0 address is the most significant byte (MSB), and little
endian in which the 0 address is the least significant byte (LSB) in the byte data. In a space of
areas 1 to 7, endian can be set by the CSnBCR setting while the target space is not accessed. In a
space of area 0, the CSnBCR setting is invalid in on-chip ROM-disabled mode. In on-chip ROM-
enabled mode, endian can be set by the CSnBCR setting in a space of areas 0 to 7.
For normal memory and SRAM with byte selection, the data bus width can be selected from three
widths (8, 16, and 32 bits) in the SH7286 or two widths (8 and 16 bits) in the SH7285 and
SH7243. For SDRAM, the data bus width can be selected from two widths (16 and 32 bits) in the
SH7286 but only the 16-bit data bus width is available in the SH7285 and SH7243. For MPX-I/O,
the data bus width is fixed at 8 bits or 16 bits, or 8 bits or 16 bits can be selected by the access
address. Data alignment is performed in accordance with the data bus width of the device. This
also means that when longword data is read from a byte-width device, the read operation must be
done four times. In this LSI, data alignment and conversion of data length is performed
automatically between the respective interfaces.
Tables 9.5 to 9.10 show the relationship between device data width and access unit. Note that
addresses corresponding to the strobe signals for the 16-bit bus width differ between big endian
and little endian. WRH indicates the 0 address in big-endian mode, but WRL indicates the 0
address in little-endian mode.
Area 0 cannot be selected as little endian. Since the instruction fetch is mixed with the 32- and 16-
bit access and the allocation to the little endian area is difficult, the instruction must be executed
within the big endian aera.
Rev. 1.00 Jun. 26, 2008 Page 305 of 1692
REJ09B0393-0100