SH7280 Datasheet, PDF (1362/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 25 USB Function Module
25.3.5 USB Interrupt Enable Register 0 (USBIER0)
USBIER0 enables the interrupt requests indicated in USB interrupt flag register 0 (USBIFR0).
When an interrupt flag is set while the corresponding bit in USBIER0 is set to 1, an interrupt
request is sent to the CPU. The interrupt vector number is decided by the contents of USB
interrupt select register 0 (USBISR0).
USBIER0 is initialized to H'00 by a power-on reset.
Bit:
Initial value:
R/W:
7
BRST
0
R/W
6
EP1
FULL
0
R/W
5
4
3
2
1
0
EP2TR ^{EP2 SETUP} EP0oTS EP0iTR EP0iTS
EMPTY TS
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value
R/W Description
7
BRST
0
R/W Bus reset
6
EP1FULL 0
R/W EP1FIFO full
5
EP2TR
0
R/W EP2 transfer request
4
EP2EMPTY 0
R/W EP2 FIFO empty
3
SETUPTS 0
R/W Setup command receive completion
2
EP0oTS
0
R/W EPOo receive completion
1
EP0iTR
0
R/W EPOi transfer request
0
EP0iTS
0
R/W EPOi transmit completion
Rev. 1.00 Jun. 26, 2008 Page 1332 of 1692
REJ09B0393-0100