SH7280 Datasheet, PDF (410/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 9 Bus State Controller (BSC)
Iφ
C bus
Bφ
I bus
Pφ
Peripheral bus
(2 + n) × Iφ
(1 + m) × Bφ
2 × Pφ
(2 + I) × Iφ
Figure 9.45 Timing of Read Access to On-Chip Peripheral I/O Registers
When Iφ:Bφ:Pφ = 4:2:1
Rev. 1.00 Jun. 26, 2008 Page 380 of 1692
REJ09B0393-0100