SH7280 Datasheet, PDF (167/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 6 Interrupt Controller (INTC)
Table 6.4 Interrupt Exception Handling Vectors and Priorities
Interrupt Vector
Interrupt Source Number Vector
Interrupt
Vector Table Priority
Corresponding
Address Offset (Initial Value) IPR (Bit)
IPR
Setting
Unit
Internal
Priority
Default
Priority
NMI
11
H'0000002C to 16


High
H'0000002F
UBC
12
H'00000030 to 15


H'00000033
H-UDI
14
H'00000038 to 15


H'0000003B
IRQ IRQ0
64
H'00000100 to 0 to 15 (0) IPR01 (15 to 12) 
H'00000103
IRQ1
65
H'00000104 to 0 to 15 (0) IPR01 (11 to 8) 
H'00000107
IRQ2
66
H'00000108 to 0 to 15 (0) IPR01 (7 to 4) 
H'0000010B
IRQ3
67
H'0000010C to 0 to 15 (0) IPR01 (3 to 0) 
H'0000010F
IRQ4
68
H'00000110 to 0 to 15 (0) IPR02 (15 to 12) 
H'00000113
IRQ5
69
H'00000114 to 0 to 15 (0) IPR02 (11 to 8) 
H'00000117
IRQ6
70
H'00000118 to 0 to 15 (0) IPR02 (7 to 4) 
H'0000011B
IRQ7
71
H'0000011C to 0 to 15 (0) IPR02 (3 to 0) 
H'0000011F
ADC ADI0
92
H'00000170 to 0 to 15 (0) IPR05 (7 to 4) 
H'00000173
ADI1
96
H'00000180 to 0 to 15 (0) IPR05 (3 to 0) 
H'00000183
ADI2
100
H'00000190 to 0 to 15 (0) IPR17 (7 to 4) 
H'00000193
Low
Rev. 1.00 Jun. 26, 2008 Page 137 of 1692
REJ09B0393-0100