SH7280 Datasheet, PDF (1455/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 26 Flash Memory
(1) On-Chip RAM Address Map when Programming/Erasing is Executed
Parts of the procedure program that are made by the user, like download request,
programming/erasing procedure, and decision of the result, must be executed in the on-chip RAM.
All of the on-chip program that is to be downloaded is in on-chip RAM. Note that on-chip RAM
must be controlled so that these parts do not overlap.
Figure 26.12 shows the program area to be downloaded.
Area to be
downloaded
(Size: 3 Kbytes)
Unusable area in
programming/erasing
processing period
<On-chip RAM>
Area that can be
used by user
Address
RAMTOP (H'FFFF8000)
DPFR
FTDAR setting
(Return value: 1 byte)
System use area
(15 bytes)
Programming/
erasing entry
FTDAR setting + 16
Initialization
process entry
FTDAR setting + 32
Initialization +
programming program
or Initialization +
erasing program
FTDAR setting + 3072
Area that can be
used by user
Figure 26.12 RAM Map after Download
Rev. 1.00 Jun. 26, 2008 Page 1425 of 1692
REJ09B0393-0100