SH7280 Datasheet, PDF (1033/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 20 A/D Converter (ADC)
• ACE bit = 0 (Normal condition: Auto-clear function is disabled.)
A/D conversion result
A/D data register (ADDR)
H'0111
H'0222
A/D conversion end interrupt
RAM, general register etc.
Read
H'0333
ADDR not renewed
H'0111
Read
H'0111
H'0444
H'0333
Read
H'0333
• ACE bit = 1 (Auto-clear function is enabled.)
A/D conversion result
A/D data register (ADDR)
H'0111
A/D conversion end interrupt
RAM, general register etc.
Because ADDR is not renewed, old data is used.
However, it is impossible to know that the data is old or not.
H'0222
H'0111
H'0333
ADDR not renewed
H'0000
H'0444
H'0333 H'0000
Automatic clearing
after read
Read
H'0111
Automatic clearing
after read
Read
H'0000
Automatic clearing
after read
Read
H'0333
When H'0000 is read, a failure is detected by software.
Figure 20.12 Example of When ADDR Auto-clear Function is
Disabled (Normal Condition)/Enabled
Rev. 1.00 Jun. 26, 2008 Page 1003 of 1692
REJ09B0393-0100