SH7280 Datasheet, PDF (827/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 16 Serial Communication Interface (SCI)
In clock synchronous mode, the SCI transmits or receives data by synchronizing with the rising
edge of the serial clock.
(1) Communication Format
The data length is fixed at eight bits. No parity bit can be added.
(2) Clock
An internal clock generated by the on-chip baud rate generator or an external clock input from the
SCK pin can be selected as the SCI transmit/receive clock. For selection of the SCI clock source,
see table 16.14.
When the SCI operates on an internal clock, it outputs the clock signal at the SCK pin. Eight clock
pulses are output per transmitted or received character. When the SCI is not transmitting or
receiving, the clock signal remains in the high state.
(3) Transmitting and Receiving Data
• SCI Initialization (Clock Synchronous Mode)
Before transmitting, receiving, or changing the mode or communication format, the software must
clear the TE and RE bits to 0 in the serial control register (SCSCR), then initialize the SCI.
Clearing TE to 0 sets the TDRE flag to 1 and initializes the transmit shift register (SCTSR).
Clearing RE to 0, however, does not initialize the RDRF, PER, FER, and ORER flags and receive
data register (SCRDR), which retain their previous contents.
Figure 16.9 shows a sample flowchart for initializing the SCI.
Rev. 1.00 Jun. 26, 2008 Page 797 of 1692
REJ09B0393-0100