SH7280 Datasheet, PDF (1105/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 22 Controller Area Network (RCAN-ET) (SH7286 Only)
22.6 DTC Interface
The DTC can be activated by the reception of a message in RCAN-ET mailbox 0. When DTC
transfer ends after DTC activation has been set, flags of RXPR0 and RFPR0 are cleared
automatically. An interrupt request due to a receive interrupt from the RCAN-ET cannot be sent to
the CPU in this case. Figure 22.14 shows a DTC transfer flowchart.
DTC initialization
DTC enable register setting
DTC register information setting
: Settings by user
: Processing by hardware
Message reception in RCAN-ET
mailbox 0
DTC activation
No
End of DTC transfer?
Yes
RXPR and RFPR flags clearing
Transfer counter = 0
No
or DISEL = 1?
Yes
Interrupt to CPU
END
Figure 22.14 DTC Transfer Flowchart
Rev. 1.00 Jun. 26, 2008 Page 1075 of 1692
REJ09B0393-0100