SH7280 Datasheet, PDF (1392/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 25 USB Function Module
25.7 Stall Operations
This section describes stall operations in the USB function module. There are two cases in which
the USB function module stall function is used:
• When the application forcibly stalls an endpoint for some reason
• When a stall is performed automatically within the USB function module due to a USB
specification violation
The USB function module has internal status bits that hold the status (stall or non-stall) of each
endpoint. When a transaction is sent from the host, the module references these internal status bits
and determines whether to return a stall to the host. These bits cannot be cleared by the
application; they must be cleared with a Clear Feature command from the host. The internal status
bit for EP0 is automatically cleared only when the setup command is received.
25.7.1 Forcible Stall by Application
The application uses USBEPSTL register to issue a stall request for the USB function module.
When the application wishes to stall a specific endpoint, it sets the corresponding bit in
USBEPSTL (1-1 in figure 25.13). The internal status bits are not changed. When a transaction is
sent from the host for the endpoint for which the USBEPSTL bit was set, the USB function
module references the internal status bit, and if this is not set, references the corresponding bit in
USBEPSTL (1-2 in figure 25.13). If the corresponding bit in USBEPSTL is set, the USB function
module sets the internal status bit and returns a stall handshake to the host (1-3 in figure 25.13). If
the corresponding bit in USBEPSTL is not set, the internal status bit is not changed and the
transaction is accepted.
Once an internal status bit is set, it remains set until cleared by a Clear Feature command from the
host, without regard to USBEPSTL register. Even after a bit is cleared by the Clear Feature
command (3-1 in figure 25.13), the USB function module continues to return a stall handshake
while the bit in USBEPSTL is set, since the internal status bit is set each time a transaction is
executed for the corresponding endpoint (1-2 in figure 25.13). To clear a stall, therefore, it is
necessary for the corresponding bit in USBEPSTL to be cleared by the application, and also for
the internal status bit to be cleared with a Clear Feature command (2-1, 2-2, and 2-3 in figure
25.13).
Rev. 1.00 Jun. 26, 2008 Page 1362 of 1692
REJ09B0393-0100