SH7280 Datasheet, PDF (1540/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 28 Power-Down Modes
28.4.2 Software Standby Mode
(1) Transition to Software Standby Mode
The LSI switches from a program execution state to software standby mode by executing the
SLEEP instruction when the STBY bit in STBCR is 1. In software standby mode, not only the
CPU but also the clock and on-chip peripheral modules halt. The clock output from the CK pin
also halts.
The contents of the CPU registers and cache remain unchanged. Some registers of on-chip
peripheral modules are, however, initialized. Table 28.4 shows the states of peripheral module
registers in software standby mode.
The CPU takes one cycle to finish writing to STBCR, and then executes processing for the next
instruction. However, it takes one or more cycles to actually write. Therefore, execute a SLEEP
instruction after reading STBCR to have the values written to STBCR by the CPU to be definitely
reflected in the SLEEP instruction.
Rev. 1.00 Jun. 26, 2008 Page 1510 of 1692
REJ09B0393-0100