SH7280 Datasheet, PDF (885/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 17 Serial Communication Interface with FIFO (SCIF)
Table 17.9 SCSMR Settings and SCIF Communication Formats
SCSMR
Bit 7 Bit 6 Bit 5 Bit 3
C/A CHR PE STOP Mode
0
0
0
0
Asynchronous
1
1
0
1
1
0
0
1
1
0
1
1
x
x
x
Clocked
synchronous
[Legend]
x: Don't care
SCIF Communication Format
Data Length
8 bits
Parity Bit
Not set
Set
7 bits
Not set
Set
8 bits
Not set
Stop Bit Length
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
None
Table 17.10 SCSMR and SCSCR Settings and SCIF Clock Source Selection
SCSMR
Bit 7
C/A
0
SCSCR
Bit 1
Bit 0
CKE1 CKE0
0
0
1
1
0
1
1
0
x
1
0
1
[Legend]
x: Don't care
Mode
Asynchronous
Clocked
synchronous
Clock
Source SCK Pin Function
Internal SCIF does not use the SCK pin
Outputs a clock with a frequency 16
times the bit rate
External Inputs a clock with frequency 16
times the bit rate
Setting prohibited
Internal Outputs the serial clock
External Inputs the serial clock
Setting prohibited
Rev. 1.00 Jun. 26, 2008 Page 855 of 1692
REJ09B0393-0100