SH7280 Datasheet, PDF (1306/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 24 I/O Ports
24.1.2 Port A Data Registers H and L (PADRH and PADRL)
PADRH and PADRL are 16-bit readable/writable registers that store port A data. In SH7243, Bits
PA15DR to PA12DR and PA9DR to PA6DR correspond to pins PA15 to PA12 and PA9 to PA6
respectively (description of multiplexed functions are abbreviated here). In SH7285, Bits PA23DR
to PA21DR, PA15DR to PA12DR and PA9DR to PA0DR correspond to pins PA23 to PA21,
PA15 to PA12 and PA9 to PA0 respectively (description of multiplexed functions are abbreviated
here). In SH7286, Bits PA23DR to PA21DR and PA15DR to PA0DR correspond to pins PA23 to
PA21 and PA15 to PA0 respectively (description of multiplexed functions are abbreviated here).
When a pin function is general output, if a value is written to PADRH or PADRL, the value is
output directly from the pin, and if PADRH or PADRL is read, the register value is returned
directly regardless of the pin state.
When a pin function is general input, if PADRH or PADRL is read, the pin state, not the register
value, is returned directly. If a value is written to PADRH or PADRL, although that value is
written into PADRH or PADRL, it does not affect the pin state. Table 24.2 summarizes read/write
operations of port A data register.
• PADRH (SH7243)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Initial
Bit
Bit Name Value R/W Description
15 to 0 
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.00 Jun. 26, 2008 Page 1276 of 1692
REJ09B0393-0100