SH7280 Datasheet, PDF (1032/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 20 A/D Converter (ADC)
20.4.6 Example of ADDR Auto-Clear Function
When the A/D data register (ADDR) is read by the CPU or DMAC, ADDR can be automatically
cleared to H'0000 by setting the ACE bit in ADCR to 1. This function allows the detection of non-
updated ADDR states.
Figure 20.12 shows an example of when the auto-clear function of ADDR is disabled (normal
state) and enabled.
When the ACE bit is 0 (initial value) and the A/D conversion result (H'0222) is not written to
ADDR for some reason, the old data (H'0111) becomes the ADDR value. In addition, when the
ADDR value is read into a general register using an A/D conversion end interrupt, the old data
(H'0111) is stored in the general register. To detect a renewal failure, every time the old data needs
to be stored in the RAM, a general register, etc.
When the ACE bit is 1, reading ADDR = H'0111 by the CPU, DMAC, or DTC automatically
clears ADDR to H'0000. After this, if the A/D conversion result (H'0222) cannot be transferred to
ADDR for some reason, the cleared data (H'0000) remains as the ADDR value. When this ADDR
value is read into a general register, H'0000 is stored in the general register. Just by checking
whether the read data value is H'0000 or not allows the detection of non-updated ADDR states.
Rev. 1.00 Jun. 26, 2008 Page 1002 of 1692
REJ09B0393-0100