SH7280 Datasheet, PDF(1382/1726 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SH7280 Datasheet, PDF (1382/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

◁

Section 25 USB Function Module

Setup Stage:

USB function

SETUP token reception

Application

Receive 8-byte command

data in EP0s

Command

to be processed by

application?

No

Automatic

processing by

this module

Yes

Set setup command

reception complete flag

(USBIFR0/SETUP TS = 1)

Interrupt request

Clear SETUP TS flag

(USBIFR0/SETUP TS = 0)

Clear EP0i FIFO (UFCLR/EP0iCLR = 1)

Clear EP0o FIFO (UFCLR/EP0oCLR = 1)

To data stage

Read 8-byte data from EP0s

Decode command data

Determine data stage direction*1

Write 1 to EP0s read complete bit

(USBTRG/EP0s RDFN = 1)

To control-in

data stage

*2

To control-out

data stage

Notes: 1. In the setup stage, the application analyzes command data from the host requiring processing by

the application, and determines the subsequent processing (for example, data stage direction, etc.).

2. When the transfer direction is control-out, the EP0i transfer request interrupt required in the status

stage should be enabled here. When the transfer direction is control-in, this interrupt is not required

and should be disabled.

Figure 25.5 Setup Stage Operation

Rev. 1.00 Jun. 26, 2008 Page 1352 of 1692

REJ09B0393-0100

▷