SH7280 Datasheet, PDF (1536/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 28 Power-Down Modes
Bit
7 to 4
3
2
1
0
Initial
Bit Name Value R/W Description

All 1
R
Reserved
These bits are always read as 1. The write value
should always be 1.
RAME3
1
R/W RAM Enable 3 (corresponding RAM addresses:
H'FFF86000 to H'FFF87FFF)
0: On-chip RAM disabled
1: On-chip RAM enabled
Note: Write 1 to this bit in the SH7243.
RAME2
1
R/W RAM Enable 2 (corresponding RAM addresses:
H'FFF84000 to H'FFF85FFF)
0: On-chip RAM disabled
1: On-chip RAM enabled
Note: Write 1 to this bit in the SH7243.
RAME1
1
R/W RAM Enable 1 (SH7286/SH7285: H'FFF82000 to
H'FFF83FFF, SH7243: H’FFF82000 to H’FFF82FFF)
0: On-chip RAM disabled
1: On-chip RAM enabled
RAME0
1
R/W RAM Enable 0 (corresponding RAM addresses:
H'FFF80000 to H'FFF81FFF)
0: On-chip RAM disabled
1: On-chip RAM enabled
Rev. 1.00 Jun. 26, 2008 Page 1506 of 1692
REJ09B0393-0100