SH7280 Datasheet, PDF (1531/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 28 Power-Down Modes
28.3.4 Standby Control Register 4 (STBCR4)
STBCR4 is an 8-bit readable/writable register that controls the operation of modules in power-
down modes. STBCR4 is initialized to H'F4 by a power-on reset but retains its previous value by a
manual reset or in software standby mode. Only byte access is possible.
Bit: 7
6
5
4
3
2
1
0



MSTP
44

MSTP
42


Initial value: 1
1
1
1
0
1
1
0
R/W: R R R R/W R R/W R R
Bit
7 to 5
4
3
2
1
0
Bit Name

MSTP44

MSTP42


Initial
Value
All 1
1
0
1
1
0
R/W
R
R/W
R
R/W
R
R
Description
Reserved
These bits are always read as 1. The write value
should always be 1.
Module Stop 44
When the MSTP44 bit is set to 1, the supply of the
clock to the SCIF3 is halted.
0: SCIF3 runs.
1: Clock supply to SCIF3 halted.
Reserved
This bit is always read as 0. The write value should
always be 0.
Module Stop 42
When the MSTP42 bit is set to 1, the supply of the
clock to the CMT is halted.
0: CMT runs.
1: Clock supply to CMT halted.
Reserved
This bit is always read as 1. The write value should
always be 1.
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 1.00 Jun. 26, 2008 Page 1501 of 1692
REJ09B0393-0100