SH7280 Datasheet, PDF (1402/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 25 USB Function Module
DTC function
Application
Set I[3:0] bits in SR
Clear RRS bit in DTCCR to 0
Set transfer information
(MRA, MRB, SAR, DAR,
[1]
CRA, CRB)
Set RRS bit in DTCCR to 1
Set the start address of transfer
information in DTC vector table
Set DTCE1 bit in DTCERA to 1
Activate DTC
DTC transfer
request
DTC transfer end
Clear DTCE1 bit in DTCERA
Receive data transfer end interrupt
Interrupt request
to CPU
Clear RXF bit in USDTENDRR
and set bits 7 to 4 in IPR18
(enable interrupts)
Set EP1DMAE bit in USBDMAR
to 1
Clear EP1DMAE bit in USBDMAR
to 0 and set bits 7 to 4 in IPR18
(disable interrupts)
[1] In block transfer mode, the block size set in CRA should be 64 bytes or less.
Figure 25.22 Example of DTC Transfer for Bulk-OUT Transfer (EP1)
(When Receive Data Size is Determined Before Receiving Out Token)
Rev. 1.00 Jun. 26, 2008 Page 1372 of 1692
REJ09B0393-0100