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| SH7280 Datasheet, PDF (1619/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family | |||
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Section 30 List of Registers
Module
Name
Register
Power-on Manual
Reset
Reset
Software Module
Standby Standby Sleep
Power-
down
mode
STBCR
STBCR2
SYSCR1
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained â
Retained â
Retained â
Retained
Retained
Retained
SYSCR2
Initialized Retained Retained â
Retained
STBCR3
Initialized Retained Retained â
Retained
STBCR4
Initialized Retained Retained â
Retained
STBCR5
Initialized Retained Retained â
Retained
STBCR6
Initialized Retained Retained â
Retained
H-UDI*3 SDIR
Retained Retained Retained â
Retained
Notes: 1. Retains the previous value after an internal power-on reset by means of the WDT.
2. Bits BN[3:0] are initialized.
3. Initialized by TRST assertion or in the Test-Logic-Reset state of the TAP controller.
Rev. 1.00 Jun. 26, 2008 Page 1589 of 1692
REJ09B0393-0100
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