SH7280 Datasheet, PDF (629/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
(b) Halting of PWM Output by External Signal
The 6-phase PWM output pins can be set automatically to the high-impedance state by inputting
specified external signals. There are four external signal input pins.
See section 13, Port Output Enable 2 (POE2), for details.
(c) Halting of PWM Output by Oscillation Stop
The 6-phase PWM output pins can detect the clock stop and set the output pin automatically to the
high-impedance state. However, the pin state is not guaranteed when the clock starts oscillation
again.
See section 4.7, Oscillation Stop Detection, for details.
11.4.9 A/D Converter Start Request Delaying Function
A/D converter start requests can be issued in channel 4 by making settings in the timer A/D
converter start request control register (TADCR), timer A/D converter start request cycle set
registers (TADCORA_4 and TADCORB_4), and timer A/D converter start request cycle set
buffer registers (TADCOBRA_4 and TADCOBRB_4).
The A/D converter start request delaying function compares TCNT_4 with TADCORA_4 or
TADCORB_4, and when their values match, the function issues a respective A/D converter start
request (TRG4AN or TRG4BN).
A/D converter start requests (TRG4AN and TRG4BN) can be skipped in coordination with
interrupt skipping by making settings in the ITA3AE, ITA4VE, ITB3AE, and ITB4VE bits in
TADCR.
• Example of Procedure for Specifying A/D Converter Start Request Delaying Function
Figure 11.79 shows an example of procedure for specifying the A/D converter start request
delaying function.
Rev. 1.00 Jun. 26, 2008 Page 599 of 1692
REJ09B0393-0100