SH7280 Datasheet, PDF (874/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 17 Serial Communication Interface with FIFO (SCIF)
Table 17.5 Bit Rates and SCBRR Settings (Clocked Synchronous Mode)
Bit Rate
(bit/s)
16
nN
28.7
n Nn
110
250
3 249
500
3
124 3
223 3
1k
2
249 3
111 3
2.5 k
2
99 2
178 2
5k
1
199 2
89 2
10 k
1
99 1
178 1
25 k
0
159 1
71 1
50 k
0
79 0
143 0
100 k
0
39 0
71 0
250 k
0 15 — — 0
500 k
0
7
——0
1M
03
2M
01
[Legend]
Blank: No setting possible
—: Setting possible, but error occurs
Pφ (MHz)
30
33
Nn N
40
nN
50
nN
233 3
116 3
187 2
93 2
187 1
74 1
149 0
74 0
29 0
14 0
0
255 — — — —
125 3
152 3
194
200 2
243 3
77
100 2
121 2
155
200 2
60 2
77
80 1
97 1
124
160 1
48 0
249
80 0
97 0
124
31 0
38 0
49
15 0
19 0
24
7
0
9
——
0
3
——
Rev. 1.00 Jun. 26, 2008 Page 844 of 1692
REJ09B0393-0100