SH7280 Datasheet, PDF (25/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

23.3 Usage Notes .................................................................................................................... 1271
Section 24 I/O Ports ...........................................................................................1273
24.1 Port A.............................................................................................................................. 1273
24.1.1 Register Descriptions ...................................................................................... 1275
24.1.2 Port A Data Registers H and L (PADRH and PADRL).................................. 1276
24.1.3 Port A Port Registers H and L (PAPRH and PAPRL).................................... 1281
24.2 Port B .............................................................................................................................. 1286
24.2.1 Register Descriptions ...................................................................................... 1287
24.2.2 Port B Data Registers H and L (PBDRH and PBDRL) .................................. 1288
24.2.3 Port B Port Registers H and L (PBPRH and PBPRL)..................................... 1294
24.3 Port C .............................................................................................................................. 1298
24.3.1 Register Descriptions ...................................................................................... 1299
24.3.2 Port C Data Register L (PCDRL) ................................................................... 1300
24.3.3 Port C Port Register L (PCPRL) ..................................................................... 1302
24.4 Port D.............................................................................................................................. 1303
24.4.1 Register Descriptions ...................................................................................... 1306
24.4.2 Port D Data Registers H and L (PDDRH and PDDRL).................................. 1306
24.4.3 Port D Port Registers H and L (PDPRH and PDPRL).................................... 1310
24.5 Port E .............................................................................................................................. 1314
24.5.1 Register Descriptions ...................................................................................... 1316
24.5.2 Port E Data Register L (PEDRL).................................................................... 1316
24.5.3 Port E Port Register L (PEPRL) ..................................................................... 1318
24.6 Port F .............................................................................................................................. 1319
24.6.1 Register Descriptions ...................................................................................... 1320
24.6.2 Port F Data Register L (PFDRL) .................................................................... 1320
Section 25 USB Function Module .....................................................................1323
25.1 Features........................................................................................................................... 1323
25.1.1 Block Diagram................................................................................................ 1324
25.2 Pin Configuration............................................................................................................ 1325
25.3 Register Descriptions...................................................................................................... 1326
25.3.1 USB Interrupt Flag Register 0 (USBIFR0)..................................................... 1327
25.3.2 USB Interrupt Flag Register 1 (USBIFR1)..................................................... 1329
25.3.3 USB Interrupt Select Register 0 (USBISR0) .................................................. 1330
25.3.4 USB Interrupt Select Register 1 (USBISR1) .................................................. 1331
25.3.5 USB Interrupt Enable Register 0 (USBIER0)................................................. 1332
25.3.6 USB Interrupt Enable Register 1 (USBIER1)................................................. 1333
25.3.7 USBEP0i Data Register (USBEPDR0i).......................................................... 1334
25.3.8 USBEP0o Data Register (USBEPDR0o)........................................................ 1334
Rev. 1.00 Jun. 26, 2008 Page xxv of xxx