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SH7280 Datasheet, PDF (1542/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family
Section 28 Power-Down Modes
(2) Exit from Software Standby Mode
Software standby mode should be exited by a power-on reset. Software standby mode cannot be
exited by a manual reset. When transferring the state of this LSI to a manual reset (the MRES pin
is driven low level) during software standby mode, operations of this LSI cannot be guaranteed.
Also, when generating an interrupt during software standby mode, operations of this LSI cannot
be guaranteed after the interrupt occurred.
(a) Exit from Software Standby by a Reset
When the RES pin is driven low, this LSI enters the power-on reset and software standby mode is
exited.
Keep the RES pin low until the clock oscillation settles.
Internal clock pulses are output continuously on the CK pin.
28.4.3 Module Standby Function
(1) Transition to Module Standby Function
Setting the standby control register MSTP bits to 1 halts the supply of clocks to the corresponding
on-chip peripheral modules. This function can be used to reduce the power consumption in normal
mode and sleep mode. Disable a module before placing it in module standby mode. In addition, do
not access the module's registers while it is in the module standby state.
The register states are the same as those in software standby mode. For details of register states,
see table 28.4.
However, the states of the CMT and DAC registers are exceptional. In the CMT, all registers are
initialized in software standby mode, but retain their previous values in module standby mode. In
the DAC, all registers retain their previous values in software standby mode, but are initialized in
module standby mode.
(2) Canceling Module Standby Function
The module standby function can be canceled by clearing the MSTP bits to 0, or by a power-on
reset (only possible for H-UDI, UBC, and DMAC). When taking a module out of the module
standby state by clearing the corresponding MSTP bit to 0, read the MSTP bit to confirm that it
has been cleared to 0.
Rev. 1.00 Jun. 26, 2008 Page 1512 of 1692
REJ09B0393-0100