SH7280 Datasheet, PDF (1003/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 20 A/D Converter (ADC)
A/D_0
Internal data bus Bus interface
AVcc
AVss
AVREF
AVREFVSS
12-bit D/A
AN0
Sample-and-
hold circuit
Aφ
GrA AN1
Impedance-
conversion
circuit
Sample-and-
hold circuit
Sample-and-
hold circuit
- ^Comparator
+
A/D 0 conversion
control circuit
Impedance-
conversion
circuit
Offset cancel circuit
AVcc
AVss
AVREF
AVREFVSS
AN2
AN3
Sample-and-
hold circuit
Impedance-
conversion
circuit
Impedance-
conversion
circuit
A/D_1
Internal data bus Bus interface
AVcc
AVss
AVREF
AVREFVSS
12-bit D/A
A/D conversion
end interrupt
signal (ADI_3)
A/D trigger signal
from MTU2
(TRGAN,
TRG0N,
TRG4AN,
TRG4BN)
A/D trigger signal
from MTU2S
(TRGAN,
TRG4AN,
TRG4BN)
AN4
AN5
AN6
AN7
Impedance-
conversion
circuit
Impedance-
conversion
circuit
Impedance-
conversion
circuit
Impedance-
conversion
circuit
Sample-and-
hold circuit
- ^Comparator
+
Offset cancel circuit
A/D 1 conversion
control circuit
A/D conversion
end interrupt
signal (ADI_4)
A/D_2
Internal data bus Bus interface
AVcc
AVss
AVREF
AVREFVSS
12-bit D/A
AN8
AN9
Impedance-
conversion
circuit
Impedance-
conversion
circuit
Sample-and-
hold circuit
- ^Comparator
+
A/D 2 conversion
control circuit
External trigger signal
(ADTRG)
AN10
Impedance-
conversion
circuit
Offset cancel circuit
AN11
Impedance-
conversion
circuit
[Legend]
ADDR:
ADCR:
ADANSR:
A/D data register
A/D control register
A/D analog input channel select register
ADSR:
A/D status register
ADSTRGR: A/D start trigger select register
A/D conversion
end interrupt
signal (ADI_4)
ADBYPSCR: A/D bypass control register
GrA:
Group A
Note: A/D_2 is only in SH7286.
Figure 20.1 Block Diagram of A/D Converter
Rev. 1.00 Jun. 26, 2008 Page 973 of 1692
REJ09B0393-0100