SH7280 Datasheet, PDF (1352/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 24 I/O Ports
• PFDRL (SH7286)
Bit: 15 14 13
-
-
-
Initial value: 0
0
0
R/W: R
R
R
12 11 10 9
8
7
6
5
4
3
2
1
0
-
PF11 PF10 PF9 PF8 PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0
DR DR DR DR DR DR DR DR DR DR DR DR
0
*
*
*
*
*
*
*
*
*
*
*
*
R
R
R
R
R
R
R
R
R
R
R
R
R
Initial
Bit
Bit Name Value R/W
15 to 12 
All 0
R
11
PF11DR Pin state R
10
PF10DR Pin state R
9
PF9DR Pin state R
8
PF8DR Pin state R
7
PF7DR Pin state R
6
PF6DR Pin state R
5
PF5DR Pin state R
4
PF4DR Pin state R
3
PF3DR Pin state R
2
PF2DR Pin state R
1
PF1DR Pin state R
0
PF0DR Pin state R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
See table 24.13.
Table 24.12 Port F Data Register L (PFDRL) Read/Write Operations
• PFDRL bits 11 and 0
Pin Function
General input
ANn input
Read
Pin state
1
Write
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Rev. 1.00 Jun. 26, 2008 Page 1322 of 1692
REJ09B0393-0100