SH7280 Datasheet, PDF (193/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 6 Interrupt Controller (INTC)
6.9.4
Handling Interrupt Request Signals as CPU Interrupt Sources but Not as DTC
Activating Sources or DMAC Activating Sources
1. Do not select DMAC activating sources or clear the DME bit to 0. If, DMAC activating
sources are selected, clear the DE bit to 0 for the relevant channel of the DMAC.
2. Clear the corresponding DTCE bit to 0 in the DTC.
3. Interrupt requests are sent to the CPU when interrupts occur.
4. The CPU clears the interrupt sources and performs the necessary termination processing in the
interrupt exception handling routine.
Rev. 1.00 Jun. 26, 2008 Page 163 of 1692
REJ09B0393-0100