SH7280 Datasheet, PDF (1716/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

MTU2–MTU2S synchronous
operation ................................................. 604
MTU2S functions ................................... 681
Multi-function timer pulse unit 2
(MTU2) .................................................. 433
Multi-function timer pulse unit 2S
(MTU2S) ................................................ 681
Multiplexed pins (port A) ..................... 1079
Multiplexed pins (port B) ..................... 1083
Multiplexed pins (port C) ..................... 1087
Multiplexed pins (port D) ..................... 1089
Multiplexed pins (port E) ..................... 1097
Multiplexed pins (port F)...................... 1102
Multiply and accumulate register high
(MACH) ................................................... 26
Multiply and accumulate register low
(MACL).................................................... 26
Multiply/Multiply-and-accumulate
operations ................................................. 31
Multiprocessor communication
function................................................... 805
N
NMI interrupt.......................................... 133
Noise filter .............................................. 958
Nonlinearity error ................................. 1005
Normal space interface ........................... 310
Normal transfer mode............................. 222
Note on changing operating mode............ 72
Note on using an external crystal
resonator ................................................... 94
Notes on board design .......................... 1007
Notes on noise countermeasures........... 1008
O
Offset error ........................................... 1005
On-board programming mode .............. 1417
On-chip peripheral module interrupts..... 135
Rev. 1.00 Jun. 26, 2008 Page 1686 of 1692
REJ09B0393-0100
On-chip peripheral module request......... 413
On-chip RAM ....................................... 1489
Operation in asynchronous mode............ 856
Operation in clocked synchronous
mode ....................................................... 866
Output load circuit ................................ 1650
P
Page conflict ......................................... 1491
Pin function controller (PFC)................ 1079
Pin states of this LSI in each processing
state ....................................................... 1657
PLL circuit ................................................ 75
POE2 interrupt source............................. 720
POE2 module timing ............................ 1636
Port output enable 2 (POE2) ................... 689
Power-down modes............................... 1493
Power-down state...................................... 62
Power-on reset ...................................... 1494
Procedure register (PR)............................. 26
Processing of USB standard
commands ............................................. 1361
Product code lineup .............................. 1677
Program counter (PC) ............................... 26
Program execution state............................ 62
Programmer mode................................. 1488
Q
Quantization error ................................. 1005
R
RCAN-ET bit rate calculation .............. 1042
RCAN-ET interrupt sources ................. 1074
RCAN-ET memory map ....................... 1022
RCAN-ET reset sequence ..................... 1062
Receive data sampling timing and receive
margin (asynchronous mode).................. 878