SH7280 Datasheet, PDF (1530/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 28 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
4
MSTP34 1
R/W Module Stop 34
When the MSTP34 bit is set to 1, the supply of the
clock to the POE2 is halted.
0: POE2 runs.
1: Clock supply to POE2 halted.
3
MSTP33 1
R/W Module Stop 33
When the MSTP33 bit is set to 1, the supply of the
clock to the IIC3 is halted.
0: IIC3 runs.
1: Clock supply to IIC3 halted.
Note: Write 1 to this bit in the SH7243.
2
MSTP32 1
R/W Module Stop 32
When the MSTP32 bit is set to 1, the supply of the
clock to the ADC0 is halted.
0: ADC0 runs.
1: Clock supply to ADC0 halted.
1
MSTP31 1
R/W Module Stop 31
When the MSTP31 bit is set to 1, the supply of the
clock to the DAC is halted.
0: DAC runs.
1: Clock supply to DAC halted.
Note: Write 1 to this bit in the SH7285 and SH7243.
0

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 1.00 Jun. 26, 2008 Page 1500 of 1692
REJ09B0393-0100