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SH7280 Datasheet, PDF (1350/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family
Section 24 I/O Ports
24.6.1 Register Descriptions
Port F is an 8-bit I/O port in SH7243 and SH7285, and 12-bit I/O port in SH7286. Port F has the
following registers. See section 30, List of Registers for details on the register address and states
in each operating mode.
Table 24.11 Register Configuration
Register Name
Abbreviation R/W Initial Value Address
Access Size
Port F data register L PFDRL
R
H'xxxx
H'FFFE3A82 8, 16
24.6.2 Port F Data Register L (PFDRL)
PFDRL is a 16-bit read-only register that stores port F data. In SH7243 and SH7285, Bits PF7DR
to PF0DR, correspond to pins PF7 to PF0 (description of multiplexed functions are abbreviated
here) and in SH7286, Bits PF11DR to PF0DR correspond to pins PF11 to PF0 respectively
(description of multiplexed functions are abbreviated here).
Even if a value is written to PFDR, the value is not written into PFDR, and it does not affect the
pin state. If PFDR is read, the pin state, not the register value, is returned directly. However, when
sampling the analog input of A/D converter, 1 is read. Table 24.12 and 24.13 summarize
read/write operations of port F data registers.
Rev. 1.00 Jun. 26, 2008 Page 1320 of 1692
REJ09B0393-0100