SH7280 Datasheet, PDF (1305/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Port A of SH7286 is an I/O port with 19 pins shown in figure 24.3.
Section 24 I/O Ports
Port A
PA23 (I/O) / CKE (output) / TIC5W (input) / POE0 (input) / IRQ1 (input) / AH (output)
PA22 (I/O) / CASL (output) / TIC5V (input) / POE4 (input) / IRQ2 (input) / CASU (output)
PA21 (I/O) / RASL (output) / TIC5U (input) / POE8 (input) / IRQ3 (input) / RASU (output)
PA15 (I/O) / CK (output)
PA14 (I/O) / RD (output)
PA13 (I/O) / WRL (output) / DQMLL (output)
PA12 (I/O) / WRH (output) / DQMLU (output) / POE8 (input)
PA11 (I/O) / WRHH (output) / DQMUU (output) / AH (output)
PA10 (I/O) / WRHL (output) / DQMUL (output)
PA9 (I/O) / CKE (output) / TCLKD (input) / RXD3 (input)
PA8 (I/O) / TCLKC (input) / TXD3 (output) / RDWR (output)
PA7 (I/O) / CASL (output) / TCLKB (input) / SCK3 (I/O)
PA6 (I/O) / RASL (output) / TCLKA (input)
PA5 (I/O) / SCK1 (I/O) / SSCK (I/O) / CS5 (output)
PA4 (I/O) / TXD1 (output) / SSO (I/O) / CS4 (output)
PA3 (I/O) / RXD1 (input) / SSI (I/O) / CS3 (output)
PA2 (I/O) / SCK0 (I/O) / SCS (I/O) / CS2 (output)
PA1 (I/O) / TXD0 (output) / CS1 (output)
PA0 (I/O) / RXD0 (input) / CS0 (output)
Figure 24.3 Port A (SH7286)
24.1.1 Register Descriptions
Port A is an 8-bit I/O port in SH7243, 17-bit I/O port in SH7285 and 19-bit I/O port in SH7286.
Port A has the following registers. See section 30, List of Registers for details on the register
address and states in each operating mode.
Table 24.1 Register Configuration
Register Name
Abbreviation R/W
Port A data register H PADRH
R/W
Port A data register L PADRL
R/W
Port A port register H PAPRH
R
Port A port register L PAPRL
R
Initial Value
H'0000
H'0000
H'xxxx
H'xxxx
Address
H'FFFE3800
H'FFFE3802
H'FFFE381C
H'FFFE381E
Access Size
8, 16, 32
8, 16
8, 16, 32
8, 16
Rev. 1.00 Jun. 26, 2008 Page 1275 of 1692
REJ09B0393-0100