SH7280 Datasheet, PDF (1217/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 23 Pin Function Controller (PFC)
23.1.10 Port D I/O Registers H and L (PDIORH and PDIORL)
PDIORH and PDIORL are 16-bit readable/writable registers that are used to set the pins on port D
as inputs or outputs. Bits PD31IOR to PD0IOR correspond to pins PD31 to PD0 respectively
(multiplexed port pin names except for the port names are abbreviated here). PDIORH and
PDIORL are enabled when the port D pins are functioning as general-purpose inputs/outputs
(PD15 to PD0 for PDIORL and PD31 to PD16 for PDIORH) and TIOC input/output in MTU2S.
In other states, they are disabled. A given pin on port D will be an output pin if the corresponding
bit in PDIORL and PDIORH is set to 1, and an input pin if the bit is cleared to 0. However, bits 16
to 0 of PDIORH in SH7243 and bits 7 of PDIORLH in SH7285 are disabled. The initial values of
PDIORL and PDIORH are H'0000.
• Port D I/O Register H (PDIORH)
Bit: 15
PD31
IOR
Initial value: 0
R/W: R/W
14
PD30
IOR
0
R/W
13
PD29
IOR
0
R/W
12
PD28
IOR
0
R/W
11
PD27
IOR
0
R/W
10
PD26
IOR
0
R/W
9
PD25
IOR
0
R/W
8
PD24
IOR
0
R/W
7
PD23
IOR
0
R/W
6
PD22
IOR
0
R/W
5
PD21
IOR
0
R/W
4
PD20
IOR
0
R/W
3
PD19
IOR
0
R/W
2
PD18
IOR
0
R/W
1
PD17
IOR
0
R/W
0
PD16
IOR
0
R/W
• Port D I/O Register L (PDIORL)
Bit: 15
PD15
IOR
Initial value: 0
R/W: R/W
14
PD14
IOR
0
R/W
13
PD13
IOR
0
R/W
12
PD12
IOR
0
R/W
11
PD11
IOR
0
R/W
10
PD10
IOR
0
R/W
9
PD9
IOR
0
R/W
8
PD8
IOR
0
R/W
7
PD7
IOR
0
R/W
6
PD6
IOR
0
R/W
5
PD5
IOR
0
R/W
4
PD4
IOR
0
R/W
3
PD3
IOR
0
R/W
2
PD2
IOR
0
R/W
1
PD1
IOR
0
R/W
0
PD0
IOR
0
R/W
23.1.11 Port D Control Registers H1 to H4 and L1 to L4 (PDCRH1 to PDCRH4 and
PDCRL1 to PDCRL4)
PDCRH1 to PDCRH4 and PDCRL1 to PDCRL4 are 16-bit readable/writable registers that are
used to select the functions of the multiplexed pins on port D.
Rev. 1.00 Jun. 26, 2008 Page 1187 of 1692
REJ09B0393-0100